System Architect Designer (SyAD®)

A tool for system simulation and design

SyAD® is a design and simulation framework for system design of heterogeneous microelectronic systems. SyAD® 2010 provides seamless design and integration of concurrent developed subsystems within an easy to use co-simulation framework.

SyAD® 2010 can be the platform to perform homogenous simulations, mixed signal / mixed level simulations, HW/SW co-simulations and integrate even non electrical components. SyAD® 2010 saves design time by leaving the models in their original environment and programming language.

SyAD® Characteristics

SyAD® is a simulation framework for system design of heterogeneous microelectronic systems.

Most of the popular simulators from commercial EDA vendors can be used within this system. Furthermore, the SyAD® environment provides on demand a comprehensive IP library of simulation models for the most common hardware description languages.

The Simulation Framework Generator SFG – the core module of SyAD® – generates automatically all required simulation sources, simulator interfaces, configurations, control scripts and prepares all captured simulation results. The SFG’s control service selects the proper simulator instances and deducts a parallel and distributed co-simulation.

SyAD® is designed as a distributed client-server application including open interfaces to the most established design systems and simulators. Due to the client-server application multiple connections to the simulations are guaranteed. The platform independent user interface communicates via a secure https protocol with the core applications of SyAD® ‘s framework.

Application areas

• Hierarchical system development for multidomain applications
• Virtual prototyping and test engineering
• System verification using behavioral modeling
• HW/SW co-simulation e.g.:
  • FBGA based co-simulation for RFID Systems
  • μC based co-simulation for automotive power management in hybrid vehicles

Starting from a homogeneous top level description of an entire system with e.g. Matlab/Simulink SyAD® allows individual transfer of its components and subsystems to analog/digital/mixed hardware descriptions in e.g. VHDL(- AMS), Verilog(-AMS), MAST and SystemC either by mapping with corresponding library elements or by a fully automated transfer.

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